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Samsung Electronics discloses BSPDN (Backside Power Supply Network) research results for the first time

Samsung Electronics discloses BSPDN (Backside Power Supply Network) research results for the first time

 

 

【Lansheng Technology Information】Samsung Electronics announced the research results of BSPDN (Backside Power Supply Network). This is the first time that Samsung Electronics has disclosed specific research results related to BSPDN.

 

BSPDN is a concept first presented at IMEC 2019. It is a design structure that improves power supply and signal lines and battery utilization bottlenecks by arranging power supply wiring on the backside of the wafer. Samsung Electronics said that by applying BSPDN, it succeeded in reducing the area by 14.8% compared with FSPDN (Front-End Power Supply Network). Specifically, in the two ARM circuits, the area was reduced by 10.6% and 19%, respectively. In addition, the wiring length was also reduced by 9.2%.

 

Current semiconductors are made using the FSPDN structure. They are arranged in the order of power line-signal line-transistor, but since the power line and signal line use the same resources, there will be problems such as bottlenecks. In addition, there is a disadvantage in that a large cost is consumed to expand the wiring layer according to the expansion of the transistor.

 

The semiconductor industry, including Samsung Electronics, has begun to focus on the BSPDN structure to overcome these structural limitations. Different from existing semiconductor structures, BSPDN is arranged in the order of signal lines-transistors-power lines. In the paper, Samsung Electronics explained that the utilization of the cells on the top of the wafer can be improved through BSPDN. In addition, issues such as interconnect bottlenecks and costs are known to be resolved.

 

In addition to Samsung Electronics, companies developing BSPDN include TSMC and Intel. Intel named BSPDN "Powervia". Intel also held a Powervia technical briefing last June. These companies aim to apply BSPDN starting from 2nm process.

 

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